Download Computer Architecture And Parallel Processing
410449 Advanced Computer Architecture and Computing
Teaching Scheme
Theory: 4 HrsJWeek
Examination Scheme
Theory: 100 Marks Duration: 3 Hours
UNIT I:
Overview of Parallel Processing and Pipelining Processing
Necessity of high performance, Constraints of conventional architecture, Parallelism in uniprocessor system, Evolution of parallel processors, future trends, Architectural Classification, Applications of parallel processing, Instruction level Parallelism and Thread Level Parallelism, Explicitly Parallel Instruction Computing (EPIC) Architecture, Case study of Intel Itanium Processor
Principles of scalable performance: Performance Metrics and Measures, Speedup Performance Laws 6Hrs.
UNIT II:
Pipeline Architecture
Principles and implementation of Pipelining, Classification of pipe lining processors, General pipe lining reservation table, Design aspect of Arithmetic and Instruction pipelining, Pipelining hazards and resolving techniques, Data buffering techniques, Job sequencing and Collision, Advanced pipelining techniques, loop unrolling techniques, out of order execution, software scheduling, trace scheduling, Predicated execution, Speculative loading, Register Stack Engine, Software pipelining, VLIW (Very Long Instruction Word) processor, Case study: Superscalar Architecture- Pentium, Ultra SP ARC 8 Hrs
UNIT III:
Vector and Array Processor
Basic vector architecture, Issues in Vector Processing, Vector performance modeling, vectorizers and optimizers, Case study: Cray Arch.
SIMD Computer Organization Masking and Data network mechanism, Inter PE Communication, Interconnection networks of SIMD, Static V s Dynamic network, cube hyper cube and Mesh Interconnection network.
Parallel Algorithms For Array Processors: Matrix Multiplication. Sorting, FFT 8Hrs.
UNIT IV:
Multiprocessor Architecture
Loosely and Tightly coupled multiprocessors, Processor characteristics of multiprocessors, Inter Processor communication network, Time shared bus, Crossbar switch, Multiport Memory Model, Memory contention and arbitration techniques, Cache coherency and bus snooping, Massively Parallel Processors (MPP), COW's and NOW's Cluster and Network of Work Stations), Chip Multiprocessing (CMP), Case Study of IBM Power4 Processor
Inter Processor Communication and Synchronization 8Hrs.
UNIT V:
Multithreaded Architecture
Multithreaded processors, Latency hiding techniques, Principles of multithreading, Issues and solutions,;
Parallel Programming Techniques
Message passing program development, Synchronous and asynchronous message passing, Message passing parallel programming, Shared Memory Programming, Data Parallel
Programming 7 Hrs.
UNIT VI:
Parallel Software Issues
a) Parallel algorithms for multiprocessors, classification of paranel algorithms, performance
of parallel algorithms
b) Operating systems for multiprocessors systems, Message passing libraries for parallel
programming interface, PVM (in distributed memory system), Message Passing
Interfaces (MPI), PThreds (in shared memory system)
c) Parallel Programming Languages: Fortan 90, Occam, C-Linda, CCC etc.
d) Issues towards cluster
computing. Introduction to Neuro Computing and GridComputing 8 Hrs.
Text Books
1. Kai Hwang, Faye A. Briggs, "Computer Architecture and Parallel Processing"
McGrawhill international Edition
2. Kai Hwang, "Advanced Computer Architecture", Tata McGrawhill Edition
References
1. V.Rajaraman, L Sivaram Murthy, "Parallel Computers", PID.
2. William Stallings, "Computer Organization and Architecture, Designing for
performance" Prentice Hall, Sixth edition
3. Kai Hwang, Scalable Parallel Computing
4. Harrold Stone, High performance computer Architceture
5. Richard Y. Kain , Advanced Computer Architecture
6. http://www.intel.com/products/processor (for Intel Itanium Processor)
7. For IBM Power 4 Processor
a. http://www. ibm.com/servers/eserver/pserieslhardware/whitepapers/power/ppc - ar
ch.html
b. http://www . i bm .com! servers/ eserver/pserics/hard ware/wh itepapers/power/ppc ar
ch 2.html
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